Computer Architecture explores how hardware components are structured and interconnected to execute software efficiently, effectively bridging the gap between assembly code and physical circuitry. It begins with performance metrics like Amdahl's Law and the "Power Wall," then moves into Instruction Set Architecture (ISA), which defines how the processor communicates with software. The core of the course focuses on maximizing processing speed through CPU pipelining (and overcoming its structural, data, and control hazards) alongside the memory hierarchy, which uses fast cache layers (L1–L3) and virtual memory to exploit data locality. Finally, it addresses modern performance scaling through Instruction-Level Parallelism (ILP), input/output structures (like DMA), and multicore architectures, which require complex cache coherence protocols to keep data synchronized across multiple processing cores.
- Teacher: Valens Nsengiyumva